Epoch Microelectronics, Inc.



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ZIGBEE: Transceiver : RF Front-end Circuits

» 0.15 um digital CMOS process without RF option » 19 man-month for circuit design and layout » Low power consumption » Small area


19.2MHz 12-Bit Current-Steering IQ-DAC

» 6th-order 4.4MHz lowpass filter - Low-output noise for SAW-less direct-up modulator - Integrated RC-calibration » Integrated bandgap for DAC & LPF common-mode and bias currents references » Current consumption of 6mA from 2.8V supply » IQ-DAC C/N of -166dBc/Hz @ 40MHz » TSMC 65nm CMOS


Low IF RF CMOS Receiver

» Low-IF RF CMOS receiver » On-chip RF AGC and BB VGA AGC control for baseband IC » BB PGA for programmable output level » Programmable BB amplitude and phase mismatch adjust for image compensation » Programmable LPF corner frequency » Programmable Fractional-N/Integer-N mode synthesizer » Integrated crystal oscillator with programmable divided output clock » 4 man-months feasibility & system design » 4 month design & layout (6-designers, 5-layout engineers) » Chip functionality achieved in 1st silicon pass » TSMC 0.18um CMOS


RX-ADPLL for GSM / WCDMA Receiver

» All digital sigma-delta frequency synthesizer » Single 2.8V supply » Frequency coverage: - GSM: 3.2-4.3GHz - WCDMA-RX: 3.3-4.5GHz » TSMC 65nm CMOS

Additional Work Includes:

Quad-band GSM receiver IC
0.25 µm, 0.18µm SOI BiCMOS

Low-noise frequency dividers for GSM transceiver IC
0.25 µm, 0.18µm SOI BiCMOS

IF-VCOs, RX-VCOs & TX-VCOs for GSM transceiver IC
0.35 µm SOI BiCMOS

LNAs, Mixers, VCOs, and quadrature signal generators for WLAN transceiver IC
0.13 um CMOS