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PLL Circuit with improved phase difference detection
Patent No: US 7,859,344 B2 / Date of Patent: 12/28/2010 |
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IC having Built-in PLL Circuit
Patent No: US 7,689,191 B2 / Date of Patent: 3/30/2010 |
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Embedded structure circuit for VCO and Regulator
Patent No: US 7,336,138 B2 / Date of Patent: 2/26/2008 |
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Semiconductor Integrated Circuit having Built-in PLL Circuit
Patent No.: US 7,212,047 B2 / Date of Patent: 5/1/2007 |
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Semiconductor Integrated Circuit having Built-in PLL Circuit
Patent No: US 7,015,735 B2 / Date of Patent: 3/21/2006
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Paper |
Presentation |
H. Akima, et. al., “A 10 GHz Frequency-Drift Temperature Compensated LC VCO with Fast-Settling Low-Noise Voltage Regulator in 0.13 um CMOS,"
in Digest of
IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, 2010 |
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H. Akima, et. al., “A Wide Tuning 1.3 GHz VCO with Fast Setting Noise Filtering Voltage Regulator in 0.18 um CMOS Process,”
in Digest of IEEE Radio Frequency Integrated Circuit (RFIC) Symposium, Anaheim, CA, 2010 |
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K. Suyama, "Challenges and Design Considerations for Integrated VCOs in Wireless Communications, "
in Digest of Microwave Workshop & Exhibition, Yokohama, Japan, 2009 |
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R. Mohn, "Modeling and Simulation of an ALL Digital Phase Locked Loop,"
in Digest of Design Automation Conference, San Francisco, CA, 2009 |
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A. Dec, et. al., "A 5GHz LC VCO with Extended Linear-Range Varactor in Purely Digital 0.15um CMOS Process,”
in Digest of IEEE Radio Frequency Integrated Circuit (RFIC), Boston, MA, 2009 |
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A. Dec, et. al., "Audio Pre-Amplifiers for Digital Electret Microphone in 0.18um CMOS Process,”
in Proc. of IEEE International Symposium on Circuits and Systems, Taipei, Taiwan, 2009. |
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A. Dec, et. al., "A Widlar bandgap based intermediate-frequency voltage-controlled oscillator for GSM/DCS transceiver ICs,”
in Digest of IEEE Radio Frequency Integrated Circuit (RFIC) Symposium, Philadelphia, PA, 2003 |
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